This invention relates to a semiconductor device, and more particularly to an improvement in the semiconductor device employing an IC chip assembled through wireless bonding of the tape automated bonding (TAB) method and capable of realizing compact and high density packaging.
According to a conventional semiconductor device assembled through the TAB method, as shown in FIGS. 1A and 1B, chip leads 9 formed on a tape film and the associated gold Au bumps 10 formed on aluminium pads on an IC chip 8 are bonded by thermo-compression. Then, the active surface of the IC chip 8 is coated with resin 11, by contacting the surface to the support tape 12 and/or covering the surface with the resin 11.
The IC chip thus mounted on a tape carrier 20 is cut off from the carrier 20 at lines X--X' and Y--Y' in FIG. 1A, to constitute a TAB packaged IC device 19.
FIG. 1B shows a plan view of the tape carrying the IC chips and also illustrates the position of cut lines X--X' and Y--Y'.
The chip leads 9 are appropriately bent or formed and bonded to a printed circuit board 15, as shown in FIG. 2. Namely, the outer portions of the chip leads 9 are bonded to bonding terminals 14 at outer bonding portions 13. In this way, a semiconductor IC device 19 is mounted and packaged on a circuit board 15.
According to such a structure as shown in FIG. 2, usually only one layer of IC devices can be packaged on one side of the printed circuit board 15. When a multiplicity of ICs are to be packaged on a printed wiring board, the wiring on the board become complicated and hence the number of layers needed in the printed wiring board 15 should increase correspondingly. When the memory capacity of such module as a whole, including a printed wiring board 15 and TAB-packaged, memory IC devices 19, is to be increased, the number of memory IC devices 19 to be mounted on the wiring board 15 should be increased provided that the capacity (area) of each IC device is the same.
Then, a certain number of ICs 19 applied in the flexible tape 1 by TAB method are detached, two to four for instance, and bonded on the surface of the circuit board, as shown in the FIG. 3.
As a result, the occupation area of the memory IC devices 19 on the circuit board increases. It becomes difficult to make the size compact and the memory capacity large. In the figures, reference numeral 13 denotes an outer lead bonding portion, 14 a bonding terminal, and 16 a through hole.